? semiconductor components industries, llc, 2012 september, 2012 ? rev. 9 1 publication order number: mc14013b/d mc14013b dual type d flip-flop the mc14013b dual type d flip ? flop is constructed with mos p ? channel and n ? channel enhancement mode devices in a single monolithic structure. each flip ? flop has independent data, (d), direct set, (s), direct reset, (r), and clock (c) inputs and complementary outputs (q and q ). these devices may be used as shift register elements or as type t flip ? flops for counter and toggle applications. features ? static operation ? diode protection on all inputs ? supply voltage range = 3.0 vdc to 18 vdc ? logic edge ? clocked flip ? flop design ? logic state is retained indefinitely with clock level either high or low; information is transferred to the output only on the positive ? going edge of the clock pulse ? capable of driving two low ? power ttl loads or one low ? power schottky ttl load over the rated temperature range ? pin ? for ? pin replacement for cd4013b ? these devices are pb ? free, halogen free and are rohs compliant ? nlv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q100 qualified and ppap capable maximum ratings (voltages referenced to v ss ) symbol parameter value unit v dd dc supply voltage range ? 0.5 to +18.0 v v in , v out input or output voltage range (dc or transient) ? 0.5 to v dd + 0.5 v i in , i out input or output current (dc or transient) per pin 10 ma p d power dissipation, per package (note 1) 500 mw t a ambient temperature range ? 55 to +125 c t stg storage temperature range ? 65 to +150 c t l lead temperature (8 ? second soldering) 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. temperature derating: plastic ?p and d/dw? packages: ? 7.0 mw/ c from 65 c to 125 c this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high ? impedance circuit. for proper operation, v in and v out should be constrained to the range v ss (v in or v out ) v dd . unused inputs must always be tied to an appropriate logic voltage level (e.g., either v ss or v dd ). unused outputs must be left open. marking diagrams 1 14 pdip ? 14 p suffix case 646 mc14013bcp awlyywwg soic ? 14 d suffix case 751a tssop ? 14 dt suffix case 948g 1 14 14013bg awlyww 14 013b alyw 1 14 a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g or = pb ? free package soeiaj ? 14 f suffix case 965 1 14 mc14013b alywg see detailed ordering and shipping information in the package dimensions section on p age 2 of this data sheet. ordering information http://onsemi.com (note: microdot may be in either location)
mc14013b http://onsemi.com 2 truth table inputs outputs clock ? data reset set q q 0 0 0 0 1 1 0 0 1 0 x 0 0 q q x x 1 0 0 1 x x 0 1 1 0 x x 1 1 1 1 x = don?t care ? = level change block diagram 10 11 9 8 4 3 5 6 12 13 2 1 s s r r d c d c q q q q v dd = pin 14 v ss = pin 7 11 12 13 14 8 9 10 5 4 3 2 1 7 6 r b c b q b q b v dd s b d b r a c a q a q a v ss s a d a pin assignment ordering information device package shipping ? mc14013bcpg pdip ? 14 (pb ? free) 25 units / rail nlv14013bcpg* mc14013bdg soic ? 14 (pb ? free) 55 units / rail nlv14013bdg* mc14013bdr2g soic ? 14 (pb ? free) 2500 units / tape & reel nlv14013bdr2g* mc14013bdtr2g tssop ? 14 (pb ? free) nlv14013bdtr2g* MC14013BFG soeiaj ? 14 (pb ? free) 50 units / rail mc14013bfelg 2000 units / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *nlv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q100 qualified and ppap capable. no change
mc14013b http://onsemi.com 3 ????????????????????????????????? ????????????????????????????????? (voltages referenced to v ss ) ?????????? ?????????? ?????????? characteristic ???? ???? ???? ??? ??? ??? ????? ????? ? 55 c ????????? ????????? c ????? ????? c ??? ??? ??? ??? ??? ??? ??? ???? ???? ??? ??? ???? ???? ??? ??? ??? ??? ?????????? ?????????? ?????????? ?????????? ?????????? output voltage ?0? level v in = v dd or 0 v in = 0 or v dd ?1? level ???? ???? ???? ??? ??? ??? ??? ??? ??? ? ? ? ??? ??? ??? 0.05 0.05 0.05 ???? ???? ???? ? ? ? ??? ??? ??? 0 0 0 ???? ???? ???? ??? ??? ??? ? ? ? ??? ??? ??? 0.05 0.05 0.05 ??? ??? ??? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ? ? ? ???? ???? ???? 4.95 9.95 14.95 ??? ??? ??? ???? ???? ???? ? ? ? ??? ??? ??? 4.95 9.95 14.95 ??? ??? ??? ? ? ? ??? ??? ??? vdc ?????????? ?????????? ?????????? ?????????? ?????????? ?????????? ?????????? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ? ? ? ??? ??? ??? ??? 1.5 3.0 4.0 ???? ???? ???? ???? ? ? ? ??? ??? ??? ??? 2.25 4.50 6.75 ???? ???? ???? ???? ??? ??? ??? ??? ? ? ? ??? ??? ??? ??? 1.5 3.0 4.0 ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ? ? ? ???? ???? ???? ???? 3.5 7.0 11 ??? ??? ??? ??? ???? ???? ???? ???? ? ? ? ??? ??? ??? ??? 3.5 7.0 11 ??? ??? ??? ??? ? ? ? ??? ??? ??? ??? vdc ?????????? ?????????? ?????????? ?????????? ?????????? ?????????? ?????????? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ? ? ? ? ???? ???? ???? ???? ? 2.4 ? 0.51 ? 1.3 ? 3.4 ??? ??? ??? ??? ? 8.8 ???? ???? ???? ???? ? ? ? ? ??? ??? ??? ??? ? 1.7 ? 0.36 ? 0.9 ? 2.4 ??? ??? ??? ??? ? ? ? ? ??? ??? ??? ??? madc ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ? ? ? ???? ???? ???? ???? 0.51 1.3 3.4 ??? ??? ??? ??? ???? ???? ???? ???? ? ? ? ??? ??? ??? ??? 0.36 0.9 2.4 ??? ??? ??? ??? ? ? ? ??? ??? ??? ??? madc ?????????? ?????????? ???? ???? ??? ??? ??? ??? ? ??? ??? 0.1 ???? ???? ??? ??? 0.00001 ???? ???? 0.1 ??? ??? ? ??? ??? 1.0 ??? ??? adc ?????????? ?????????? ???? ???? ??? ??? ? ??? ??? ??? ??? ???? ???? ??? ??? 5.0 ???? ???? ??? ??? ? ??? ??? ??? ??? pf ?????????? ?????????? ?????????? ?????????? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ? ? ? ??? ??? ??? ??? 1.0 2.0 4.0 ???? ???? ???? ???? ? ? ? ??? ??? ??? ??? 0.002 0.004 0.006 ???? ???? ???? ???? ??? ??? ??? ??? ? ? ? ??? ??? ??? ??? 30 60 120 ??? ??? ??? ??? adc ?????????? ?????????? ?????????? ?????????? ???? ???? ???? ???? ??? ??? ??? ??? ????????????????? ????????????????? ????????????????? ????????????????? a/khz) f + i dd i t = (1.5 a/khz) f + i dd i t = (2.3 a/khz) f + i dd ??? ??? ??? ??? adc 2. data labelled ?typ? is not to be used for design purposes but is intended as an indication of the ic?s potential performance. 3. the formulas given are for the typical characteristics only at 25 c. 4. to calculate total supply current at loads other than 50 pf: i t (c l ) = i t (50 pf) + (c l ? 50) vfk where: i t is in a (per package), c l in pf, v = (v dd ? v ss ) in volts, f in khz is input frequency, and k = 0.002.
mc14013b http://onsemi.com 4 ????????????????????????????????? ????????????????????????????????? (c l = 50 pf, t a = 25 c) ??????????????? ??????????????? characteristic ????? ????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??????????????? ??????????????? ??????????????? ??????????????? output rise and fall time t tlh , t thl = (1.5 ns/pf) c l + 25 ns t tlh , t thl = (0.75 ns/pf) c l + 12.5 ns t tlh , t thl = (0.55 ns/pf) c l + 9.5 ns ????? ????? ????? ????? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ???? ???? ???? ???? 100 50 40 ???? ???? ???? ???? ??? ??? ??? ??? ??????????????? ??????????????? ??????????????? ??????????????? ????? ????? ????? ????? ????? ????? ????? ????? ????? ????? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ???? ???? ???? ???? 175 75 50 ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??????????????? ??????????????? ??????????????? ??????????????? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ???? ???? ???? ???? 175 75 50 ???? ???? ???? ???? ??????????????? ??????????????? ??????????????? ??????????????? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ???? ???? ???? ???? 225 100 75 ???? ???? ???? ???? ??????????????? ??????????????? ??????????????? ????? ????? ????? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ??? ??? ??? ns ??????????????? ??????????????? ??????????????? ??????????????? ????? ????? ????? ????? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ??? ??? ??? ??? ns ??????????????? ??????????????? ??????????????? ????? ????? ????? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ??? ??? ??? ns ??????????????? ??????????????? ??????????????? ????? ????? ????? ???? ???? ???? ???? ???? ???? ? ? ? ???? ???? ???? 4.0 10 14 ???? ???? ???? ??? ??? ??? ??????????????? ??????????????? ??????????????? ??????????????? ????? ????? ????? ????? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ???? ???? ???? ???? ???? ???? ???? ???? 15 5.0 4.0 ??? ??? ??? ??? s ??????????????? ??????????????? ??????????????? ????? ????? ????? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ??? ??? ??? ns ??????????????? ??????????????? ??????????????? ??????????????? ????? ????? ????? ????? ????? ????? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ??? ??? ??? ??? ??? ??? ns ??????????????? ??????????????? ??????????????? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? 5. the formulas given are for the typical characteristics only at 25 c. 6. data labelled ?typ? is not to be used for design purposes but is intended as an indication of the ic?s potential performance. 7. data must be valid for 250 ns with a 5 v supply, 100 ns with 10 v, and 70 ns with 15 v. logic diagram (1/2 of device shown) r c d s c c cc c c c c c c q q
mc14013b http://onsemi.com 5 figure 1. dynamic signal waveforms (data, clock, and output) figure 2. dynamic signal waveforms (set, reset, clock, and output) 20 ns 20 ns d c q 90% 50% 10% t su (h) t su (l) t h t wh t wl 90% 50% 10% v dd v ss v dd v ss v oh v ol t tlh t thl t phl t plh 90% 50% 10% inputs r and s low. 1 f cl 20 ns 20 ns set or reset clock q or q 90% 50% 10% v dd v ss v dd v ss v oh v ol 20 ns 20 ns t rem 90% 50% 10% 50% t plh t phl t w 20 ns t w typical applications n ? stage shift register binary ripple up ? counter (divide ? by ? 2 n ) modified ring counter (divide ? by ? (n+1)) d clock n th 2 1 q d c q q d c q q d c q q clock n th 2 1 d c q q d c q q d c q q q t flip-flop n th 2 1 q d c q q d c q q d c q q clock
mc14013b http://onsemi.com 6 package dimensions pdip ? 14 case 646 ? 06 issue p 17 14 8 b a dim min max min max millimeters inches a 0.715 0.770 18.16 19.56 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l m ??? 10 ??? 10 n 0.015 0.039 0.38 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. f hg d k c seating plane n ? t ? 14 pl m 0.13 (0.005) l m j 0.290 0.310 7.37 7.87
mc14013b http://onsemi.com 7 package dimensions soic ? 14 nb case 751a ? 03 issue k notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of at maximum material condition. 4. dimensions d and e do not include mold protrusions. 5. maximum mold protrusion 0.15 per side. h 14 8 7 1 m 0.25 b m c h x 45 seating plane a1 a m s a m 0.25 b s c b 13x b a e d e detail a l a3 detail a dim min max min max inches millimeters d 8.55 8.75 0.337 0.344 e 3.80 4.00 0.150 0.157 a 1.35 1.75 0.054 0.068 b 0.35 0.49 0.014 0.019 l 0.40 1.25 0.016 0.049 e 1.27 bsc 0.050 bsc a3 0.19 0.25 0.008 0.010 a1 0.10 0.25 0.004 0.010 m 0 7 0 7 h 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 6.50 14x 0.58 14x 1.18 1.27 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc14013b http://onsemi.com 8 package dimensions tssop ? 14 case 948g issue b dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? . s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l ? u ? seating plane 0.10 (0.004) ? t ? ??? ??? section n ? n detail e j j1 k k1 ? w ? 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t ? v ? 14x ref k n n 7.06 14x 0.36 14x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc14013b http://onsemi.com 9 package dimensions soeiaj ? 14 case 965 issue b h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.10 0.20 0.004 0.008 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 1.42 --- 0.056 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). 0.13 (0.005) m 0.10 (0.004) d z e 1 14 8 7 e a b view p c l detail p m a b c d e e l m z on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 mc14013b/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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